This invention relates to a semiconductor integrated tuning circuit device and, more particularly, to a semiconductor integrated tuning circuit device with a built-in phase locked loop.
A typical example of the receiver converts a high-frequency broadcasting signal through a mixer to an intermediate frequency signal. A prior art tuner incorporated in the AM/FM receiver is disclosed in Japanese Patent Publication of Unexamined Application No. 60-223335. The prior art tuner includes a band pass filter in the AM intermediate frequency circuit, and the band pass filter is implemented by a switched capacitor circuit. The switched capacitor circuit requires a clock signal. A PLL (Phase Locked Loop) synthesizer has a reference frequency oscillator, and the clock signal is generated on the basis of the output signal the reference frequency oscillator. The intermediate frequency signal of the AM receiver is as low as 455 kHz. If an LCR network is used as the band pass filter for the intermediate frequency signal, the LCR network occupies wide area on a semiconductor substrate, and such a large-sized LCR network is undesirable. For this reason, the switched capacitor circuit is used as the band pass filter.
The Japanese Patent Publication of Unexamined Application teaches that the clock signal is generated on the basis of the output signal of the PLL synthesizer. The prescaler reduces the frequency fref of the reference frequency signal, and produces an output signal. The output signal has the frequency equal to a submultiple fref/P of the reference frequency signal fref. The output frequency signal fref/P is supplied to a phase comparator. On the other hand, a local oscillator supplies an oscillating signal fA to a programmable frequency divider, and the programmable frequency divider reduces the frequency of the oscillating signal fA. The output signal of the programmable frequency divider has the frequency equal to a submultiple fA/Q of the frequency of the oscillating signal fA. The output signal fA/Q is also supplied to the phase comparator, and the phase comparator compares the output signal fref/P with the output signal fA/Q to see whether or not both signal are equal in frequency to each other. The output signal of the phase comparator is representative of the difference of the frequency between the output signals fref/P and fA/Q. The phase comparator supplies the output signal thereof through a low pass filter to the local oscillator. The local oscillator is responsive to the output signal of the phase comparator so as to vary the frequency of the oscillating signal fA. Thus, the oscillating signal fA follows the reference frequency signal fref.
Another prior art tuner is disclosed in Japanese Patent Publication of Unexamined Application No. 5-218894. The prior art tuner is operative in the VHF (Very High Frequency)/UHF (Ultra High Frequency) bands. The intermediate signals are produced from the broadcasting signal of a broadcasting satellite and the communicating signal of a communication satellite, and an AM modulation system is employed in the prior art tuner. The prior art receiver receives the broadcasting signal at 27 MHz, and the intermediate frequency signal is converted to a cable-television signal at 6 MHz and a high-vision signal at 12 MHz. In order to respond to the plural intermediate frequencies different in pass band, the prior art tuner includes a switched filter, which is variable in band width, and an n pass filter. The n pass filter includes n elements arranged in parallel so as to supply n local oscillating frequencies, and each of the elements is implemented by a series of two frequency converters.
A prior art tuner with built-in PLL circuit is disclosed in Japanese Patent Application 9-266467, which was filed by the applicant identical with the assignee of the present invention. The prior art tuner with built-in PLL circuit is illustrated in FIG. 1 of the drawings. The prior art tuner has a band pass filter 34 outside of a semiconductor substrate 33, and the band pass filter 34 is connected between a mixer 11 and an intermediate frequency amplifier 13. The band pass filter 34 is implemented by an LC circuit, and connected to two output terminals of the mixer 11 so as to vary the tuning frequency.
The prior art tuner with built-in PLL further comprises a data interface 23, a program coupler 16, a reference counter 17, a reference signal generator 18, a phase comparator 19 and a quartz oscillator 31. The quartz oscillator 31 is separated from the semiconductor substrate 33, and is connected to the reference signal generator 18. The quartz oscillator 31 supplies an oscillating signal to the reference signal generator 18. The reference signal generator 18 produces a reference frequency signal from the oscillating signal, and supplies the reference frequency signal to the reference counter 17.
User inputs a piece of control data DA representative of a station to be tuned into the data interface 23. The data interface supplies a piece of control data representative of a dividing ratio and another piece of control data representative of another dividing ratio to the program counter 16 and the reference counter 17, respectively. The reference counter 17 reduces the frequency of the reference frequency signal at the given dividing ratio, and supplies an output signal to the first input node of the phase comparator 19. The program counter 16 reduces the frequency of an input signal at the given dividing ratio, and supplies an output signal to the second input node of the phase comparator 19. The phase comparator 19 produces an output signal representative of the difference in frequency between the output signals.
The prior art tuner with built-in PLL further comprises a charge pump 20, a tuning amplifier 21, a voltage-controlled oscillator 30 and a local oscillator 14, and a prescaler 15. The voltage-controlled oscillator 30 is separated from the semiconductor substrate 33. Thus, the prior art tuner with built-in PLL is broken down into the integrated circuit on the semiconductor substrate, the voltage-controlled oscillator 30, the quartz oscillator 31 and the band pass filter 34. In other words, the four parts are assembled into the prior art tuner.
The output signal of the phase comparator 19 is supplied to the charge pump 20, and charge pump 20 produces an output voltage signal variable with the number of pulses. The change pump 20 supplies the output voltage signal through a tuning amplifier 21 to the voltage-controlled oscillator 30. The voltage controlled oscillator 30 produces an oscillation signal at a frequency proportional to the output voltage signal, and the oscillation signal is supplied through the local oscillator 14 to the mixer 11 and the prescaler 15. The prescaler 15 reduces the frequency of the oscillating signal, and supplies an output signal in a frequency band of the program counter 16. The program counter 16 reduces the output signal of the prescaler 15, and supplies the output signal thereof to the phase comparator 19. Thus, the local oscillator 14, the prescaler 15, the program counter 16, the reference counter 17, the oscillator 18, the phase comparator 19, the charge pump 20, the tuning amplifier 21 and the voltage controlled oscillator 30 form in combination the PLL circuit.
The broadcasting facility standards are different among the major countries. FIG. 2 teaches the telecasting facility standards in Japan, the United States of America, Germany and China. The central frequency and the band width of a channel are standardized to be 58.75 MHz and 6 MHz in Japan, 45, 75 MHz and 6 MHz in the United States of America, 38.9 MHz and 7 MHz in German and 38.0 MHz and 8 MHz in China. The band width is indicative of the frequency difference at 3 dB less than the peak value at the central frequency as shown in FIG. 3.
Moreover, the manufacturer takes the burst characteristics and the voice frequency characteristics into account, and determines the filtering characteristics of the band pass filter 34. The manufacturer tailors the band pass filters 34 to each of the importing countries, and connects the band pass filters to the prior art tuner with built-in PLL. Thus, the prior art tuner requires plural kinds of band pass filter. This results in high production cost due to the complicated management of discrete parts and the time-consuming design work.
It is therefore an important object of the present invention to provide a tuner, which is low in production cost.
To accomplish the object, the present invention proposes to replace the band pass filter with a variable band pass filter under the control of a data interface.
In accordance with one aspect of the present invention, there is provided a comprising a tuning circuit fabricated on a semiconductor substrate and including a mixer for converting a receiving signal to an intermediate frequency signal, an amplifier and a variable band pass filter connected between the mixer and the amplifier for changing a central frequency of the intermediate frequency signal and a band width for a channel, a phase locked loop including circuit components fabricated on the semiconductor substrate and supplying an oscillation signal synchronous with a reference oscillation signal to the mixer, and a controller responsive to an instruction supplied outside of the semiconductor substrate and supplying control signals representative of the central frequency and the band width to the variable band pass filter.